1. Field of the Invention
The present invention relates to an IC (Integrated Circuit) memory card system for recording picture data or similar data.
2. Description of the Related Art
A current trend in the digital electronic still camera or similar imaging apparatus art is toward the use of an IC memory card with a semiconductor memory as a medium for recording picture data representative of a scene picked up. While the IC memory card for such an application has customarily been implemented with an SRAM (Static Random Access Memory), an IC memory card with a built-in EEPROM (Electrically Erasable Programmable Read Only Memory) is attracting much attention from, among others, the cost standpoint. In a digital electronic still camera, therefore, the interface to the IC memory card should preferably be operable with both of an SRAM and an EEPROM.
Regarding an IC memory card system using an SRAM, assume that data are inputted to or outputted from the memory card over an 8-bit parallel transfer bus. Then, the memory card is provided with a connector having eight terminals, and not only data to be written to or read out of a memory chip but also an address designating a storage location are applied to the eight terminals. The data and the address are distinguished from each other by the logical states of a first and a second state terminal also included in the connector. When the address specifying a particular storage location of the memory chip is constituted by a plurality of bytes, the bytes are each represented by a particular combination of the logical states of the two state terminals. Assuming an IC memory card with an SRAM having a capacity greater than 64 bytes, for example, an address is constituted by three bytes, i.e., a lower byte, an intermediate byte, and a higher byte. In such a case, the first and second state terminals indicate the reading of the lower byte when both of the first and second state terminals are in a logical low level, the reading of the intermediate byte when the first state terminal is in a high level and the second state terminal is in a low level, or the reading of the higher byte when the first state terminal is in a low level and the second state terminal is in a high level. Further, the first and second state terminals indicate the reading or writing of data when both are in a high level. The write-in and read-out of data are distinguished from each other on the basis of the logical states of read terminal and a write terminal further included in the connector. For example, data is read out when the read terminal is in a high level or written in when the write terminal is in a high level. As stated above, the connector of an IC memory card using an SRAM has data terminals for inputting and outputting data and addresses, state terminals for distinguishing data and addresses, and a read and a write terminal for distinguishing the write-in and the read-out. Data is written to or read out of the memory card on the basis of control signals which are sent from the camera to such terminals.
In an EEPROM, when old data exists in an address where new data should be written in, the new data cannot be written in the address unless the old data is deleted. For the erasure of old data and the write-in of new data, a program voltage of 12 volts is needed in addition to a logical voltage of 5 volts. Further, an IC memory card with an EEPROM performs unique operations which an IC memory card with an SRAM does not perform, e.g., erasure and verification. Hence, a memory card with an EEPROM has to send a busy signal to the camera or host indicating that processing is under way in the card, so that the camera may temporarily stop sending control signals or data while such unique operations are under way.
An I/O (input/output) bus system proposed in "IC Memory Card Guideline" by Japan Electronics Industry Development Association (JEIDA) has a program voltage terminal and an indication terminal or ready/busy terminal. However, the problem with an IC memory card using an I/O bus type EEPROM is that the card has to determine whether or not to execute erasure and generate an erase signal within itself. This type of memory card, therefore, has a more complicated controller arrangement and a lower operation rate than an IC memory card with an SRAM.